1. Field of the Invention
The present invention is directed to a method for producing an MOS transistor structure with an elevated body conductivity.
2. Description of the Prior Art
MOS transistor structures of the above type can be formed as a lateral structure in which a gate electrode is arranged on a surface of the transistor structure. The source and drain terminals of the transistor structure are likewise arranged in the region of this surface. A vertical structure also can be used, in which the source and drain terminals are arranged at opposite surfaces. Instead of a gate electrode on the surface of the transistor structure, a gate electrode can be provided in a gate trench that extends from a surface of the structure into the transistor structure.
In these types of arrangements, also used to form thyristors and IGBTs, it is desirable to achieve high conductivity in the body region of the MOS transistor structure, so that when current flow stops, the effect of the parasitic transistor structure, which is unavoidably present in the arrangement, can be avoided or minimized. This problem exists when the source body diode is in a state of flow polarization when the current flow stops, and thus an injection of electrons ensues, particularly in the case of high current flow. The result is known as the latch-up effect; i.e. the parasitic transistor structure behaves as a transistor connected in the circuit. The current flow thus can no longer be cut off. As a result, the MOS transistor structure is destroyed. This can be avoided when the conductivity of the body region, which permits excess holes to be withdrawn from the body region in the direction of the contact to the body region, is increased. To accomplish this, it is necessary to increase the doping of the body region, which has the side effect of increasing the cut-off voltage of the MOS channel of the transistor structure.
U.S. Pat. No. 5,821,583 discloses a vertical MOS transistor structure with a trenched gate electrode, in which the body region has a heavily doped region, which is set back from the channel region, and a lightly doped region, which also encompasses the channel region of the transistor structure. This structure is produced by first depositing, by implantation and diffusion into a substrate, a lightly doped region, in which a heavily doped region of a smaller extent is then implanted. A disadvantage of this structure is that, while aligning the heavily doped region relative to the gate trench, the doping concentration in the channel region cannot be precisely controlled, or corresponding doping level tolerances must be accepted, and moreover only a reduced dopant concentration is present in areas of the body region that are remote from the channel region.